DS3690 3.3v 26-channel, three-stateable transmission gate ________________________________________________________________ maxim integrated products 1 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. general description the DS3690 is a 26-channel, three-stateable transmis-sion gate designed for transparent digital signal trans- fer when enabled and fast-gated bus isolation when the device is disabled. each of the 26 independent chan- nels can be used for input, output, or i/o signal appli- cations, with a typical signal propagation delay of less than 10ns. using the logic-control input, all channels can be simultaneously enabled for bus transmission or forced to a high-impedance condition to isolate a criti- cal component on that bus. the DS3690 operates on a single 3.3v (typical) power supply and is available in a space-saving 56-pin lead- free tqfn package. applications pos terminalspin pads cryptographic processors gaming lottery terminals industrial controls and monitoring features ? 26 bidirectional channels ? low propagation delay (< 10ns typ) ? high-speed on/off time (< 20ns typ) ? 2.7v to 3.6v supply ? wide temperature range: -55? to +85? ? tqfn package (5mm x 11mm x 0.8mm) ordering information rev 0; 10/07 + denotes a lead-free package. trl = tape and reel. part temp range pin-package DS3690t+ -55c to +85c 56 tqfn DS3690t+trl -55c to +85c 56 tqfn 10 ch10a 12 ch12a 13 ch13a 14 ch14a 11 ch11a 9 ch09a 16 ch16a 18 ch18a 19 ch19a 20 ch20a 17 ch17a 15 ch15a 8 ch08a 5 ch05a 7 ch07a 6 ch06a 4 ch04a 3 ch03a 2 ch02a 1 ch01a 39 ch10b 37 ch12b 36 ch13b 35 ch14b 38 ch11b 40 ch09b 33 ch16b 31 ch18b 30 ch19b 29 ch20b 32 ch17b 34 ch15b 41 ch08b 44 ch05b 42 ch07b 43 ch06b 45 ch04b 46 ch03b 47 ch02b 48 ch01b 21 2322 24 25 26 27 28 ch21a ch22a ch23a v cc gnd ch23b ch22b ch21b 56 5455 53 52 51 50 49 ch24a ch25a ch26a gnd ch26b ch25b ch24b top view + tqfn exposed pad (on bottom) ce DS3690 (5mm 11mm 0.8mm) pin configuration typical operating circuit appears at end of data sheet. downloaded from: http:///
DS3690 3.3v 26-channel, three-stateable transmission gate 2 _______________________________________________________________________________________ absolute maximum ratings recommended operating conditions(t a = -55? to +85?) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. voltage range on any pin relative to ground......-0.5v to +6.0v operating temperature range ...........................-55? to +85? storage temperature range .............................-55? to +125? soldering temperature...................refer to ipc/jedec j-std-020 parameter symbol conditions min typ max units supply voltage v cc (note 1) 2.7 3.3 3.6 v input logic 1 v ih (note 1) 0.7 x v cc v cc + 0.3 v input logic 0 v il (note 1) -0.3 0.3 x v cc v dc electrical characteristics(v cc = +2.7v to +3.6v, t a = -55? to +85?, unless otherwise noted.) parameter smbol conditions min tp max units standby current i cc ce = ch1 ch26 = v cc , i out = 0ma 1 a input leakage current ( ce ) i i v in = 0v to v cc , t a = +25c -0.1 +0.1 a i/o leakage current i io ce = v ih -1.0 +1.0 a ac electrical characteristics(v cc = +2.7v to +3.6v, t a = -55? to +85?, unless otherwise noted.) parameter smbol conditions min tp max units propagation dela y (a to b or b to a) t pd ce = v il (note 2) 10 ns chip enable to output valid t cev (notes 2, 3) 20 ns chip enable to output deselect t cez (notes 2, 3) 20 ns input to ce setup time t is (note 4) 0 ns skew between channels t s (notes 5, 6) 1 ns input pulse levels: v il = 0.0v, v ih = 2.7v input pulse rise and fall times: 5ns input and output timing reference level: v cc /2 output load: c l (100pf) ac test conditions downloaded from: http:///
DS3690 3.3v 26-channel, three-stateable transmission gate _______________________________________________________________________________________ 3 note 1: all voltages referenced to ground. note 2: typical waveform shown is labeled chxxa (input) to chxxb (output), and is identical in function when selecting pin chxxb(as the input) to pin chxxa (as the output). note 3: output reference level is v cc /2. note 4: input transitions prior to the ce falling edge are ignored (don? care). note 5: propagation delay differential between any two channels when using a common input signal source. note 6: guaranteed by design and not 100% tested. capacitance(t a = +25?) parameter smbol conditions min tp max units input capacitance ( ce ) c in not production tested 5 pf i/o capacitance c io not production tested 8 pf timing diagrams chxxachxxb t pd t pd t pd figure 1. digital channel propagation delay t cev t is high impedance chxxachxxb don't care ce figure 2. digital channels enabled by ce don't care high impedance chxxachxxb ce t cez figure 3. digital channels disabled by ce downloaded from: http:///
DS3690 3.3v 26-channel, three-stateable transmission gate 4 _______________________________________________________________________________________ typical operating characteristics (v cc = 3.3v, t a = +25?, unless otherwise noted.) power-supply current vs. input voltage DS3690 toc01 input voltage (v) supply current (a) 3.2 2.9 2.3 2.0 2.6 1.e-09 1.e-08 1.e-07 1.e-06 1.e-05 1.e-04 1.e-03 1.e-021.e-10 ce = ch1a?h26a,ch1b?h26b = float t a = +85 c t a = +85 c t a = +25 c t a = +25 c t a = -55 c t a = -55 c channel on-resistance change vs. input voltage DS3690 toc02 input voltage (v) delta resistance ( ) 2.6 2.0 1.3 0.7 5 10 15 20 25 0 0.0 3.3 i out = -0.1ma, ch1 output-voltage high vs. output current DS3690 toc03 output current (ma) output voltage (v) -1 -2 -3 -4 2.7 2.8 2.9 3.0 3.1 3.22.6 -5 0 v in = +3.0v, ch1a?h1b output-voltage low vs. output current DS3690 toc04 output current (ma) outputvoltage (v) 4 3 2 1 0.1 0.2 0.3 0.4 0.5 0.60.0 05 v in = +0.3v, ch1a?h1b downloaded from: http:///
DS3690 3.3v 26-channel, three-stateable transmission gate _______________________________________________________________________________________ 5 pin description pin name function 1 ch01a channel 1 terminal a 2 ch02a channel 2 terminal a 3 ch03a channel 3 terminal a 4 ch04a channel 4 terminal a 5 ch05a channel 5 terminal a 6 ch06a channel 6 terminal a 7 ch07a channel 7 terminal a 8 ch08a channel 8 terminal a 9 ch09a channel 9 terminal a 10 ch10a channel 10 terminal a 11 ch11a channel 11 terminal a 12 ch12a channel 12 terminal a 13 ch13a channel 13 terminal a 14 ch14a channel 14 terminal a 15 ch15a channel 15 terminal a 16 ch16a channel 16 terminal a 17 ch17a channel 17 terminal a 18 ch18a channel 18 terminal a 19 ch19a channel 19 terminal a 20 ch20a channel 20 terminal a 21 ch21a channel 21 terminal a 22 ch22a channel 22 terminal a 23 ch23a channel 23 terminal a 24 v cc supply voltage 25, 53 gnd ground 26 ch23b channel 23 terminal b 27 ch22b channel 22 terminal b 28 ch21b channel 21 terminal b 29 ch20b channel 20 terminal b pin name function 30 ch19b channel 19 terminal b 31 ch18b channel 18 terminal b 32 ch17b channel 17 terminal b 33 ch16b channel 16 terminal b 34 ch15b channel 15 terminal b 35 ch14b channel 14 terminal b 36 ch13b channel 13 terminal b 37 ch12b channel 12 terminal b 38 ch11b channel 11 terminal b 39 ch10b channel 10 terminal b 40 ch09b channel 9 terminal b 41 ch08b channel 8 terminal b 42 ch07b channel 7 terminal b 43 ch06b channel 6 terminal b 44 ch05b channel 5 terminal b 45 ch04b channel 4 terminal b 46 ch03b channel 3 terminal b 47 ch02b channel 2 terminal b 48 ch01b channel 1 terminal b 49 ch24b channel 24 terminal b 50 ch25b channel 25 terminal b 51 ch26b channel 26 terminal b 52 ce chip-enable input (active low) 54 ch26a channel 26 terminal a 55 ch25a channel 25 terminal a 56 ch24a channel 24 terminal a ep exposed paddle. must be connected to ground. downloaded from: http:///
DS3690 detailed description the DS3690 is a 26-channel, noninverting, bidirectionalcmos transmission gate, and is intended for use in applications where a downstream component must be isolated from a common control, address, or data bus in a timely fashion. each of the 26 independent channels can be used for input, output, or i/o signal applications. the chip-enable input ( ce ) allows gated bus control for either signal transmission or bus isolation.each independent channel consists of two pins (?hxxa?and ?hxxb?where xx is 01?6). since all 26 channels are capable of bidirectional function, either chxxa or chxxb can be selected as the input pin for any unidirectional signal requirements. a change of logic state on one side of any channel is directly reflect- ed on the other side of that channel. signal propagation delay (chxxa to chxxb, or chxxb to chxxa) is illustrated in figure 1 as t pd . all channels can be simultaneously enabled or forcedto a high-impedance state using the ce input. when ce becomes a logic zero, all channels are enabled for signal transmission within t cev (see figure 2). when ce becomes a logic one, all channels are forced to a high-impedance state within t cez (see figure 3). applications information power-supply decoupling to achieve the best results when using the DS3690,decouple the power supply with a 0.1? capacitor. use a high-quality, ceramic surface-mount capacitor if possible. surface-mount components minimize lead inductance, which improves performance, while ceram- ic capacitors have adequately high-frequency response for decoupling applications. pin connections for optimum circuit operation, connect pins 25 and 53 toa common ground. the exposed pad on the package bottom side should be connected to ground. to prevent an unused transmission channel from gener- ating any undesired activity, it is recommended that one side of that unused channel be connected to ground (either the a or b terminal, at the designer? discretion). 3.3v 26-channel, three-stateable transmission gate 6 _______________________________________________________________________________________ micro external memory r/w control address (a 0? ) i/o (dq 0? ) r/w control address (a 0? ) i/o (dq 0? ) +3.3v ce bus enable DS3690 typical operating circuit downloaded from: http:///
DS3690 3.3v 26-channel, three-stateable transmission gate maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 _____________________ 7 2007 maxim integrated products is a registered trademark of maxim integrated products, inc. v cc v cc ch01b ch01a ch02b ch02a ch03b ch03a ch26b gnd ch26a ce DS3690 functional diagram package information (for the latest package outline information, go to www.maxim-ic.com/dallaspackinfo .) package type document no. 56 tqfn 21-0187 downloaded from: http:///
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